gf-audit
01Command
Audit plugin quality and optionally auto-fix issues.
109 3mo ago A 13 tokens
109Stars on the repository
64Mods indexed here, across every type
3mo agoLast push, which is what freshness is scored on
noneNo LICENSE: all rights reserved, so bodies are not copied
gf-boards
02Command
List supported boards and query pinouts.
109 3mo ago A 11 tokens
gf-cocotb
03Command
Generate Python testbench using Cocotb.
109 3mo ago A 14 tokens
gf-demo
04Command
One-command demo - generates, lints, and simulates a working project.
109 3mo ago A 18 tokens
gf-detect
05Command
Scan codebase for missing IP blocks, stubs, and CDC issues.
109 3mo ago A 18 tokens
gf-doctor
06Command
Verify tools and dependencies, organized by capability tier.
109 3mo ago B 6 tokens
gf-fix
07Command
Automatically fix lint errors in a SystemVerilog file using iterative lint-fix cycles.
109 3mo ago A 6 tokens
gf-flash
08Command
Flash bitstream to FPGA board.
109 3mo ago A 10 tokens
gf-formal
09Command
/gf-formal rtl/fifo.sv # Auto-generate and prove properties /gf-formal rtl/fifo.sv --property "never overflows" # Prove specific property /gf-formal formal/fifo.sby # Run existing .sby config.
109 3mo ago A 7 tokens
gf-fusesoc
10Command
Generate FuseSoC .core file for the project.
109 3mo ago A 15 tokens
gf-gen
11Command
Generate SystemVerilog code artifacts: modules, testbenches, or packages.
109 3mo ago A 6 tokens
gf-ip
12Command
/gf-ip list # Show all available IP blocks /gf-ip info fifosync # Show block details and ports /gf-ip add fifosync # Install block into current project.
109 3mo ago A 7 tokens
gf-lint
13Command
Run Verilator lint checks to find errors and warnings in SystemVerilog code.
109 3mo ago A 6 tokens
gf-map
14Command
Generate a comprehensive map of a SystemVerilog codebase with parallel analysis agents.
109 3mo ago A 6 tokens
gf-pcb
15Command
Generate KiCad schematic and PCB (AI-verified draft).
109 3mo ago A 16 tokens
gf-pinmap
16Command
Generate pin constraint file for target board.
109 3mo ago A 11 tokens
gf-pnr
17Command
Run nextpnr place and route for open-source FPGA targets.
109 3mo ago A 8 tokens
gf-release
18Command
Validate GateFlow plugin readiness and prepare a versioned release.
109 3mo ago A 14 tokens
gf-scan
19Command
Index all SystemVerilog files in the current project to build a module database.
109 3mo ago A 6 tokens
gf-sim
20Command
Compile and run a SystemVerilog simulation using Verilator.
109 3mo ago A 6 tokens
gf-tui
21Command
Open the GateFlow terminal console.
109 3mo ago A 10 tokens