OpenHBM: Instructions file for Claude Code

CLAUDE.md -- the binding RTL contract for Netie Open HBM

This file is read FIRST by every AI agent (Claude 4.7, GPT-5.5, Gemini 3.1, or any successor) before producing any code in this repository. Treat every section below as a hard requirement, not a guideline. Violations block CI.

If you also see AGENTS.md, read it second -- it indexes everything else.

1. SystemVerilog subset (synthesisable code)

The synthesisable subset is IEEE 1800-2017 with the following constraints:

1.1 Allowed

• logic for all signals (no wire, no reg in synthesisable code).
• always_ff @(posedge clk or negedge rst_ni) for sequential.
• always_comb for combinational.
• always_latch ONLY when justified by an inline comment explaining why a flop is not appropriate, and never on a clock-crossing path.
• Packed structs and unions for bundled wires.
• enum logic [...] for state encodings (one-hot or binary; specify in ()).
• parameter and localparam for compile-time constants.
• function automatic for combinational helpers.
• Generate blocks with named labels (for (...) begin : g_name).
• SVA properties via assert property, cover property, assume property.
• import of an interface package into a leaf module IS allowed; declaring interface ports IS NOT (see 1.2).

1.2 Banned in synthesisable code

• Four-state wire declarations (use logic).
• reg keyword (use logic).
• interface ports on leaf IP modules. (Top-level subsystem wrappers MAY use interfaces; leaf IP must use packed structs to keep tools portable.)
• force / release.
• disable fork.
• event types.
• class / virtual class (verification only).
• mailbox, semaphore (verification only).
• $random, $urandom, $urandom_range (use pyvsc constrained random in the testbench, never inside RTL).
• Non-blocking assignment in always_comb (<= belongs only in always_ff).
• Blocking assignment to a flop signal (= belongs only in always_comb).
• Implicit nets. Set default_nettype none at every file top.
• Synchronous-active-high resets (we use synchronous and asynchronous active-low rst_ni; see 3.2).
• casex, casez (use case ... inside or unique case).
• Bare case without unique or priority.
• Multiple-driver nets.
• Output-port driving from more than one always_* block.
• defparam.
• Behavioural delays (#5) outside testbenches.