Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx agentmods add skills/easyzoom/aix-skills/cortex-r5-debugnpx skills add easyzoom/aix-skills --skill cortex-r5-debuggit clone --depth 1 https://github.com/easyzoom/aix-skillsWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/easyzoom/aix-skills/cortex-r5-debug)<a href="https://agentmods.dev/skills/easyzoom/aix-skills/cortex-r5-debug"><img src="https://agentmods.dev/badge/skills/easyzoom/aix-skills/cortex-r5-debug.svg" alt="Measured on agentmods" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00053 | $0.02200 |
| Opus 5 | $0.00026 | $0.01100 |
| Sonnet 5 | $0.00011 | $0.00440 |
| Haiku 4.5 | $0.00005 | $0.00220 |
Grade A, and why
cortex-r5-debug scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 6d ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 98 lines — stays where its author put it; the contents beside it link to each section on GitHub.
Cortex-R5 Debug
Overview
Use this skill to debug Cortex-R5 (ARMv7-R, PMSA) systems by separating core mode, boot source, memory map, exception vectors, TCM, MPU/cache policy, interrupt controller, and safety configuration. Cortex-R5 uses an MPU (not an MMU) and CP15-based control; failures usually come from memory attributes, ECC/TCM setup, or lockstep configuration rather than C code.
When To Use
Use this skill when:
- The user is bringing up or debugging Cortex-R5/R5F, Cortex-R4, or Cortex-R7 firmware (Xilinx Zynq UltraScale+ RPU, TI Hercules/Sitara, and similar).
- The issue involves early boot, Undefined/Prefetch Abort/Data Abort exceptions, IRQ/FIQ, ATCM/BTCM, MPU regions, caches, ECC/parity, lockstep, split mode, or JTAG attach.
- The platform is an SoC with real-time cores, safety islands, motor/control firmware, storage controllers, or heterogeneous Linux + R5 systems.
Do not use this skill for Cortex-M microcontrollers. Use cortex-m-debug when the target has NVIC, VTOR, and M-profile exception behavior instead of CP15/CPSR.
First Questions
Ask for:
- SoC/board, exact core, boot owner, toolchain, debugger, and whether the R5 runs bare metal or an RTOS.
- Core mode: single core, split (performance) mode, or lock-step (
DCLS); which core the debugger is attached to. - Memory map: boot ROM, flash, DDR, OCM/SRAM,
ATCM/BTCMbase and size, stacks, heaps, and linker script. - MPU/cache policy, TCM enable state (
INITRAMA/INITRAMBreset straps), ECC init, and DMA/coherency paths. - Exception symptom plus a dump of
CPSR/SPSR,DFSR/DFAR(data abort) orIFSR/IFAR(prefetch abort),LR, and disassembly aroundPC/LR.
Debug Workflow
-
Prove debugger attach and reset control. Confirm JTAG target and core selection, reset type, and halt behavior. Read
MIDRandMPIDRto confirm you are on the expected R5 core, and check whether the sibling R5 or an A-core changes state. -
Verify boot entry. Check the reset vector and vector base. Vectors sit at
0x00000000or at0xFFFF0000whenSCTLR.V(bit 13) is set. Verify per-mode banked stacks are set forSVC,IRQ,FIQ,ABT,UND, andSYSbefore C runtime init.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 6d ago First seen · 98 lines · 53 tokens per session scan A 57360ae9aa5f
cortex-r5-debug is a skill published in the GitHub repository easyzoom/aix-skills (31 stars, last pushed 1mo ago), licensed MIT. It adds 53 tokens to every session and 2,200 once invoked, about $0.0003 per session on Opus 5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-30.
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