Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx skills add easyzoom/aix-skills --skill riscv-mcu-debuggit clone --depth 1 https://github.com/easyzoom/aix-skillsWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/easyzoom/aix-skills/riscv-mcu-debug)<a href="https://agentmods.dev/skills/easyzoom/aix-skills/riscv-mcu-debug"><img src="https://agentmods.dev/badge/skills/easyzoom/aix-skills/riscv-mcu-debug/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/easyzoom/aix-skills/riscv-mcu-debug"><img src="https://agentmods.dev/badge/skills/easyzoom/aix-skills/riscv-mcu-debug.svg" alt="Reviewed on agentmods" width="80" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00044 | $0.01414 |
| Opus 5 | $0.00022 | $0.00707 |
| Sonnet 5 | $0.00009 | $0.00283 |
| Haiku 4.5 | $0.00004 | $0.00141 |
Grade A, and why
riscv-mcu-debug scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 9d ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 159 lines — stays where its author put it; the contents beside it link to each section on GitHub.
RISC-V MCU Debug
Overview
Use this skill to debug RISC-V MCU firmware systematically. Identify the exact core, SoC, debug module, toolchain, memory map, and trap state before changing startup code, linker scripts, flash settings, or machine-mode configuration.
When To Use
Use this skill when:
- The target is a RISC-V MCU or bare-metal RISC-V SoC.
- The user mentions OpenOCD, GDB, JTAG, RISC-V debug module,
mstatus,mcause,mepc,mtvec, trap handlers, startup code, or linker scripts. - Firmware cannot flash, stops before
main, traps, hangs, or has no UART/log output.
Do not use this skill for Cortex-M, 8051, embedded Linux application debugging, or general C code review without target evidence.
First Questions
Ask for:
- Exact chip, board, and core if known, such as RV32IMAC, RV32E, RV64, F/D extension, or vendor core name.
- Toolchain: GCC, LLVM, vendor IDE, Zephyr, RT-Thread, or bare metal.
- Debug path: OpenOCD, vendor GDB server, J-Link, WCH-Link, onboard probe, or UART bootloader.
- Current symptom: cannot connect, cannot flash, no boot, trap, hang, no log, or peripheral failure.
- Available artifacts: ELF, MAP, linker script, startup file, OpenOCD config, UART log, trap dump, or GDB transcript.
Workflow
-
Confirm the target profile. RISC-V MCU behavior depends on XLEN, extensions, privilege mode, vendor CSRs, debug module, and memory map.
-
Classify the failure phase. Use connect, flash, reset/startup, trap, runtime hang, peripheral bring-up, or RTOS scheduling.
-
Establish a non-destructive debug session. Prefer halt/reset-halt and symbol loading before flash erase or startup rewrites.
-
Collect trap and reset evidence. Record
pc,sp,mstatus,mcause,mepc,mtval,mtvec, and key memory addresses. -
Check linker and startup alignment. Confirm reset address, vector/trap base, RAM origin, stack top,
.datacopy,.bsszeroing, andmaincall path. -
Ask before risky operations. Mass erase, option bytes, boot mode, security locks, and vendor flash config changes require explicit approval.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 9d ago First seen · 159 lines · 44 tokens per session scan A 7ebed0c33ca4
riscv-mcu-debug is a skill published in the GitHub repository easyzoom/aix-skills (31 stars, last pushed 1mo ago), licensed MIT. It adds 44 tokens to every session and 1,414 once invoked, about $0.0002 per session on Opus 5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-30.
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