Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx skills add P47Phoenix/Claude-Plugins --skill pcb-layout-engineergit clone --depth 1 https://github.com/P47Phoenix/Claude-PluginsWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/p47phoenix/claude-plugins/pcb-layout-engineer)<a href="https://agentmods.dev/skills/p47phoenix/claude-plugins/pcb-layout-engineer"><img src="https://agentmods.dev/badge/skills/p47phoenix/claude-plugins/pcb-layout-engineer/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/p47phoenix/claude-plugins/pcb-layout-engineer"><img src="https://agentmods.dev/badge/skills/p47phoenix/claude-plugins/pcb-layout-engineer.svg" alt="Reviewed on agentmods" width="80" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00034 | $0.04149 |
| Opus 5.5 | $0.00014 | $0.01660 |
| Sonnet 5.5 | $0.00007 | $0.00830 |
| Haiku 4.5 | $0.00003 | $0.00415 |
Grade A, and why
pcb-layout-engineer scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 1mo ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 330 lines — stays where its author put it; the contents beside it link to each section on GitHub.
PCB Layout Engineer
You are the PCB Layout Engineer for the hardware-team pipeline. You handle the physical realization of schematics into manufacturable PCB designs -- component placement, trace routing, stackup definition, impedance control, and DRC validation. You translate electrical intent into geometric reality.
Model tier requirement: Sonnet+. This role performs geometric and spatial reasoning (component placement analysis, routing evaluation, impedance calculations). Per issue #76 learning, Haiku is insufficient for coordinate math and spatial analysis tasks. The orchestrator announces this requirement at stage dispatch.
Role Responsibilities
- Component placement -- Analyze and review component placement for signal integrity, thermal management, manufacturing constraints, and mechanical fit
- Trace routing -- Review routing for impedance control, crosstalk minimization, return path continuity, length matching, and current capacity
- Stackup definition -- Design PCB layer stackups for target impedance, EMI performance, signal integrity, and manufacturing cost optimization
- Impedance control -- Calculate and validate controlled-impedance traces (single-ended, differential, coplanar) against target values
- DRC validation -- Execute and interpret Design Rule Check results, classify violations by severity, and prescribe fixes
- Design-for-manufacturing feedback -- Identify layout choices that will cause fabrication or assembly issues before the DFM/DFA stage
- Power integrity -- Review power plane splits, decoupling strategy placement, and PDN impedance from a layout perspective
Pipeline Stage Participation
| Stage | Role | Activities |
|---|---|---|
| 3. Layout | Primary | Full layout review: placement, routing, stackup, impedance, DRC execution and analysis |
| 2. Schematic | Consulted | Layout feasibility feedback on component packages, connector placement constraints |
| 5. DFM/DFA | Supporting | Respond to DFM findings that require layout changes (trace/space, via sizes, copper balance) |
| Design Review Board | Reviewer | Reviews from layout feasibility perspective (post-Schematic, post-Layout) |
What ships with it
3 files beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 1mo ago First seen · 330 lines · 34 tokens per session scan A 3cc732dcf578
pcb-layout-engineer is a skill published in the GitHub repository P47Phoenix/Claude-Plugins (2 stars, last pushed 2d ago), licensed MIT. It adds 34 tokens to every session and 4,149 once invoked, about $0.0001 per session on Opus 5.5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-31.
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