m5stack-core2

A hardware reference and development guide for the M5Stack Core2, a small programmable ESP32 device with a touchscreen, touch input, clock, microphone, speaker, motion sensor and battery. It covers several Core2 hardware revisions.

In plain words
What is it for?
Use it when building software for an M5Stack Core2, especially when working with its display, touch controls, power system, clock, audio hardware or motion sensor.
Why use it?
It helps prevent code and wiring mistakes caused by differences between Core2 revisions and by confusing the classic ESP32 with newer M5Stack chips.

Skill for Claude CodeCodex

Install

Getting it into your agent

One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.

agentmods
npx agentmods add skills/iot-forge/m5stack-skills/core2
Any agent
npx skills add iot-forge/m5stack-skills --skill core2
Clone the repo
git clone --depth 1 https://github.com/iot-forge/m5stack-skills

Made for: Claude Code, Codex.

Per session 328 Skills are progressive disclosure: only the name and description are preloaded; the body loads when the skill is used.
When invoked 6,398 The whole file, excluding the scripts and references it only reads on demand.
Security scan A 0 findings. Scan, not verified.
Origin original No closer match found in the catalogue.
Token cost

What it costs to keep this loaded

Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.

ModelPer sessionOnce invoked
Fable 5 $0.00328 $0.06398
Opus 5 $0.00164 $0.03199
Sonnet 5 $0.00066 $0.01280
Haiku 4.5 $0.00033 $0.00640

Measured 2d ago against content hash e96423d63040, method: parsed. Prices are Anthropic first-party input rates as of 2026-08-30, from the pricing page.

Security

Grade A, and why

m5stack-core2 scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 2d ago.

A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.

Nothing flagged

None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.

plugins/core/skills/core2/SKILL.md · 313 lines

How it starts

The opening of the file, as written. The whole thing — 313 lines — stays where its author put it; the contents beside it link to each section on GitHub.

M5Stack Core2 family development

Core2 is M5Stack's 2.0" touchscreen ESP32 (classic) Controller family. Every member shares the same core: ESP32-D0WDQ6-V3 (dual-core Xtensa LX6 @ 240MHz), 16MB flash, 8MB PSRAM, an AXP192 power management IC, a 2.0" 320x240 ILI9342C IPS display with FT6336U capacitive touch, a BM8563 RTC, an NS4168 I2S amp + SPM1423 PDM mic, and a 500mAh 3.7V battery charged over a magnetic pogo-pin base. Official docs index: https://docs.m5stack.com/en/core/core2

This skill folds M5Stack's several Core2 hardware revisions into one skill rather than near-duplicate skills per revision — read "Hardware revisions" below before writing code, since the differences (which IMU chip, whether an ATECC608 crypto chip and RGB LED ring are present, physical dimensions) matter for correctness.

Important: this is classic ESP32, not S3/P4

Unlike the other M5Stack Controller skills in this marketplace (Cardputer Adv, Tab5), Core2 runs on a classic ESP32 (ESP32-D0WDQ6-V3) — Xtensa LX6, not LX7, no native USB (programming/serial goes through an onboard USB-UART bridge chip, not a USB-CDC peripheral on the SoC itself), no ULP-RISC-V coprocessor, and Bluetooth Classic + BLE 4.2 rather than BLE 5.

For chip-level capability questions that aren't about this board's specific wiring — RMT, LEDC, I2S, ADC/touch, deep sleep and wake sources, the ULP-FSM coprocessor, PSRAM/flash config, WiFi/BT coexistence — see the esp32 skill (classic ESP32), shipped in the esp32-chips plugin of this same marketplace. Install it with claude plugin install esp32-chips@m5stack if it isn't present. Do not assume ESP32-S3 or ESP32-P4 chip-skill content applies to this board; the classic part differs substantially.

Hardware revisions

M5Stack has shipped several Core2 revisions under two product lines — plain Core2 and Core2 For AWS. The AWS line adds hardware the plain line doesn't have; within each line, "v1.3" denotes a component refresh (IMU and USB-serial bridge chip swapped) rather than a peripheral change.

Read the full file on GitHub · 313 lines

Files

What ships with it

3 files beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.

Changes

What this file has done since we first saw it

Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.

  1. 2d ago First seen · 313 lines · 328 tokens per session scan A e96423d63040

Subscribe to this mod's changes

m5stack-core2 is a skill published in the GitHub repository iot-forge/m5stack-skills (2 stars, last pushed 8d ago), licensed MIT. It adds 328 tokens to every session and 6,398 once invoked, about $0.0016 per session on Opus 5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-31.

Related

Other skills, from other repositories