Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx agentmods add skills/iot-forge/m5stack-skills/esp32npx skills add iot-forge/m5stack-skills --skill esp32git clone --depth 1 https://github.com/iot-forge/m5stack-skillsWhat it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5 | $0.00306 | $0.04706 |
| Opus 5 | $0.00153 | $0.02353 |
| Sonnet 5 | $0.00061 | $0.00941 |
| Haiku 4.5 | $0.00031 | $0.00471 |
Grade A, and why
esp32 scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 2d ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 247 lines — stays where its author put it; the contents beside it link to each section on GitHub.
ESP32 (classic) chip capabilities
This skill is the chip layer, not a board layer. A board skill (e.g.
m5stack-core2) tells you what's wired to what on one specific product;
this skill tells you what the classic ESP32 silicon itself can do — the
peripherals, low-power modes, memory options, and concurrency model that
are the same on every classic-ESP32 board regardless of vendor. Read a
board's own skill first for pin numbers and I2C addresses, then come here
when the user wants to go deeper on a capability than "call the vendor's
high-level library and move on" — e.g. writing a custom RMT-based protocol,
understanding why an ADC read returns garbage once WiFi turns on, tuning
deep-sleep/hibernation wake behavior, or pinning tasks to cores.
What "ESP32-D0WDQ6-V3" actually names
This is the oldest and most fragmented naming scheme in the family, worth untangling explicitly:
- D0WD / D0WDQ6 / D0WDR2 identify the die + package, not a firmware
target — all three are the same dual-core Xtensa LX6 silicon, differing
only in package size and whether flash/PSRAM is bonded into the same
package:
- ESP32-D0WD-V3 — QFN 5×5mm, no in-package flash or PSRAM (external only).
- ESP32-D0WDQ6-V3 — QFN 6×6mm (larger, more pins broken out for external QSPI), no in-package flash or PSRAM (external only). This is the die used inside ESP32-WROOM-32 modules, which add the external flash chip inside the module's own metal can — the bare D0WDQ6 chip itself still has no embedded memory.
- ESP32-D0WDR2-V3 (EOL, superseded by ESP32-D0WDR2-V3→D0WDRH2-V3) — same die family with 2MB of PSRAM bonded into the package. This is the die used inside ESP32-WROVER modules (which add external flash on top, same as WROOM).
- There's also a single-core sibling (S0WD, used in ESP32-SOLO-1 modules) and a dual-core-with-more-GPIO sibling (D2WD) — not covered here since no M5Stack board is known to use them; flag it if one turns up.
- "-V3" is the chip revision (silicon stepping), not part of the package family. It means this specific die incorporates the v3.0 errata fixes Espressif shipped starting ~2019 — see "Why the V3 revision matters" below. Essentially all ESP32 chips manufactured since then (which is to say, essentially every ESP32-based M5Stack product currently sold) are V3 or later; V1/V0 silicon mostly only turns up in old stock or secondhand boards.
- Practical takeaway: "ESP32-D0WDQ6-V3" and "classic ESP32" mean the same thing for firmware purposes on any current M5Stack board — the package/revision suffix mostly matters for hardware design (which module to buy) and for the one or two errata-driven firmware differences noted below, not for which peripherals or APIs are available.
What ships with it
3 files beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 2d ago First seen · 247 lines · 306 tokens per session scan A e736fa05af1f
esp32 is a skill published in the GitHub repository iot-forge/m5stack-skills (2 stars, last pushed 8d ago), licensed MIT. It adds 306 tokens to every session and 4,706 once invoked, about $0.0015 per session on Opus 5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-31.
Other skills, from other repositories
ble
Operate ESP-Claw BLE: initialize BLE, advertise, handle connections, process events, and inspect module state.
nucleo-release
Build, gate, and ship NucleoOS to the Cardputer — firmware via OTA and the web/SD payload via the device file API. Use when the user asks to release, deploy, flash, OTA, sync the SD, or push a web app to the device. Covers the one-command release, firmware-only and SD-only paths, and the gotchas (PIN, .gz shadowing…
nucleo-native-app
Scaffold and implement a NucleoOS native firmware app (C++) correctly — anti-flicker, poll handler, RAM discipline, input routing, registration. Use when creating or fixing a native app in firmware/components/nucleoapp/.
nucleo-release-dual
Build and ship NucleoOS to BOTH Cardputer units — the original and the ADV — in one pass. Use when the user wants to release/build/OTA/flash for both boards, the ADV and non-ADV Cardputers, or two devices at once. Encodes the key fact that it's ONE universal binary (runtime board auto-detect), so you build once and…
cap_router_mgr
Manage router automation rules: list/get/add/update/delete/reload with strict rulejson format.
light_switch
Turn a board light on or off, set LED strip color or brightness, and control GPIO lights. Requires boardhardwareinfo skill.