esp32-c6

ESP32-C6 chip capabilities

This skill is the chip layer, not a board layer. A board skill (e.g. a future m5stack-nanoc6) tells you what's wired to what on one specific product; this skill tells you what the ESP32-C6 silicon itself can do — the peripherals, low-power modes, memory options, and (most distinctively) three-radio behavior that are the same on every ESP32-C6 board regardless of vendor. Read a board's own skill first for pin numbers and I2C addresses, then come here when the user wants to go deeper on a capability than "call the vendor's high-level library and move on" — e.g. diagnosing WiFi+Thread coexistence packet loss, offloading an always-on task to the LP core, or figuring out why SD card code ported from another ESP32 chip won't compile.

The one thing every ESP32-C6 user needs to know: three radios, one antenna, time-shared

The C6 is Espressif's first WiFi 6 chip, and it packs three separate wireless protocols — WiFi 6, Bluetooth LE 5.3, and 802.15.4 (Thread 1.3 + Zigbee 3.0 certified) — behind a single shared RF front-end and antenna. They are time-division multiplexed, not simultaneous: per Espressif's own coexistence docs, "a module cannot receive or transmit data while another module is engaged in data transmission or reception." This is fine for light, bursty use (WiFi telemetry plus occasional BLE provisioning) but becomes a real design constraint for continuous-reception roles like a Thread Border Router or Zigbee gateway sharing the radio with active WiFi — see references/memory-radio.md for the practical coexistence behavior and Espressif's own recommendation to use a dual-SoC design (e.g. an ESP32-S3 or classic ESP32 for WiFi/BLE, paired with a separate ESP32-H2 or this chip dedicated to 802.15.4) for a production WiFi-backed Border Router/gateway rather than relying on one C6 doing all three at once.

This is also why M5Stack uses the C6 two different ways in its own catalog: as a standalone MCU with its own application code (NanoC6, Stamp C6LoRa), and as a dedicated radio co-processor for a separate, radio-less main SoC (the ESP32-C6-MINI-1U on Tab5, talking to Tab5's ESP32-P4 over SDIO; Stamp-P4's "AddOn C6 For P4" is the same pattern). Both are the same chip and everything in this skill applies to either role — the co-processor case just means the C6's own application code is usually Espressif's esp-hosted firmware (or similar) rather than user logic, with the host chip's skill (e.g. esp32-p4) being where a user's actual WiFi/BLE application code lives.