Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx skills add iot-forge/m5stack-skills --skill esp32-p4git clone --depth 1 https://github.com/iot-forge/m5stack-skillsWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/iot-forge/m5stack-skills/esp32-p4)<a href="https://agentmods.dev/skills/iot-forge/m5stack-skills/esp32-p4"><img src="https://agentmods.dev/badge/skills/iot-forge/m5stack-skills/esp32-p4/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/iot-forge/m5stack-skills/esp32-p4"><img src="https://agentmods.dev/badge/skills/iot-forge/m5stack-skills/esp32-p4.svg" alt="Reviewed on agentmods" width="80" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00270 | $0.03964 |
| Opus 5.5 | $0.00108 | $0.01586 |
| Sonnet 5.5 | $0.00054 | $0.00793 |
| Haiku 4.5 | $0.00027 | $0.00396 |
Grade A, and why
esp32-p4 scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 1mo ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 204 lines — stays where its author put it; the contents beside it link to each section on GitHub.
ESP32-P4 chip capabilities
This skill is the chip layer, not a board layer. A board skill (e.g.
m5stack-tab5) tells you what's wired to what on one specific product; this
skill tells you what the ESP32-P4 silicon itself can do — the peripherals,
multimedia hardware, low-power modes, memory options, and concurrency model
that are the same on every ESP32-P4 board regardless of vendor. Read a
board's own skill first for pin numbers and I2C addresses, then come here
when the user wants to go deeper on a capability than "call the vendor's
high-level library and move on" — e.g. driving the MIPI camera pipeline,
encoding H.264 in hardware, using the LP core while the main system sleeps,
or getting real throughput out of USB HS OTG.
The one thing every ESP32-P4 user needs to know: no radio, ever
Unlike every other current ESP32 variant, the P4 has zero wireless
hardware — no WiFi, no Bluetooth, no Thread/Zigbee/802.15.4. This isn't a
stripped-down SKU; the chip was designed as a high-performance
applications/HMI processor and pairs with a separate radio chip (an
ESP32-C6 on M5Stack's Tab5 and Stamp-P4, most commonly) over SDIO or SPI
when a project needs wireless. If a user asks "why won't WiFi.begin()
compile/link" or "how do I get WiFi on my P4 board," the answer is always
"it needs a companion radio chip and a host-side driver (ESP-Hosted or
similar) talking to it" — not a missing library or wrong board setting. See
that board's own skill (e.g. the m5stack-tab5 skill's "WiFi needs pin
setup" section) for the actual wiring/init pattern on a specific product.
Not classic ESP32, not S2/S3, not C3/C6/C5, not H2
M5Stack (and the ESP32 family generally) spans several very different chips that are easy to conflate. Get this wrong and code silently targets the wrong architecture or assumes a peripheral that doesn't exist.
| Chip | Cores / arch | Wireless | Native USB | Notable extras | Not on this chip |
|---|---|---|---|---|---|
| ESP32-P4 (this skill) | 2× RISC-V HP cores @ up to 400MHz + 1× RISC-V LP core @ up to 40MHz | None — always pairs with a companion chip (M5Stack's Tab5/Stamp-P4 use a C6) | Yes — USB 2.0 HS OTG and a separate FS OTG, both with integrated PHY | MIPI-CSI+ISP, MIPI-DSI, hardware JPEG enc/dec, hardware H.264 encode, PPA + 2D-DMA, Ethernet MAC, PIE AI/DSP instruction extensions, up to 32MB in-package PSRAM | Any wireless radio, Xtensa SIMD (esp-dsp/ESP-DL use PIE instead, see below) |
| ESP32-S3 | 2× Xtensa LX7 @ up to 240MHz + 1 low-power coprocessor core | WiFi 4 + BLE 5 | Yes — OTG (full-speed only) + separate USB-Serial-JTAG | Xtensa SIMD/vector AI instructions, ULP-RISC-V and ULP-FSM | Thread/Zigbee/802.15.4, WiFi 6, MIPI-DSI/CSI, hardware video codecs |
| ESP32 (classic) | 2× Xtensa LX6 @ 240MHz | WiFi 4 + Bluetooth Classic + BLE 4.2 | No | Widest library/example coverage, oldest silicon | Native USB, SIMD extensions, ULP-RISC-V |
| ESP32-S2 | 1× Xtensa LX7 @ 240MHz | WiFi 4 only, no Bluetooth at all | Yes — OTG | Very low deep-sleep current | Second core, Bluetooth |
| ESP32-C3 | 1× RISC-V @ 160MHz | WiFi 4 + BLE 5 | No | Cheapest/smallest | Second core, native USB, SIMD |
| ESP32-C6 | 1× RISC-V @ 160MHz + LP core | WiFi 6 (2.4GHz) + BLE 5.3 + Thread/Zigbee (802.15.4) | No | First ESP32 with WiFi 6 + Matter-ready radio stack — this is the P4's usual wireless companion | Second core, native USB, hardware FPU |
| ESP32-C5 | 1× RISC-V @ 240MHz + LP core | WiFi 6 dual-band (2.4+5GHz) + BLE 5 + 802.15.4 | No | Only dual-band-WiFi6 ESP32 variant | Second core, native USB |
| ESP32-H2 | 1× RISC-V @ 96MHz | No WiFi — BLE 5 + Thread/Zigbee only | No | Purpose-built low-power mesh/Matter radio | WiFi entirely, second core |
What ships with it
5 files beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 1mo ago First seen · 204 lines · 270 tokens per session scan A f6fc072ac996
esp32-p4 is a skill published in the GitHub repository iot-forge/m5stack-skills (5 stars, last pushed 12d ago), licensed MIT. It adds 270 tokens to every session and 3,964 once invoked, about $0.0011 per session on Opus 5.5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-31.
Other skills, from other repositories
sticky-device
Hardware facts, ESP-IDF firmware patterns, ePaper/touch APIs, and Playground publishing rules for the Seeed Studio reTerminal Sticky (ESP32-S3, 3.97" 800x480 e-ink). Use when working on reTerminal Sticky or "Sticky" firmware, apps, pin assignments, display refresh, touch gestures, deep sleep, ESPHome/Home Assistant…
embedded-engineer
(oh-my-embedded) Senior embedded systems engineer. ESP32/STM32, FreeRTOS, RF design, power management, peripheral interfaces. Use for any embedded/firmware/electronics/hardware question.
firmware-debugger
(oh-my-embedded) Firmware debugging via GDB and serial monitor. Breakpoints, memory inspection, stack traces, JTAG/SWD. Requires debug probe.
component-sourcer
(oh-my-embedded) Electronic component search, BOM optimization, alternative parts finder. Searches JLCPCB/LCSC, Nexar/Octopart catalogs.
embedded-review
(oh-my-embedded) Embedded firmware code review. Memory safety, ISR correctness, RTOS pitfalls, peripheral interfaces, C/C++ UB traps. Severity P0-P3.
pcb-designer
(oh-my-embedded) PCB design with KiCad. Schematic capture, component placement, trace routing, DRC, Gerber export, JLCPCB BOM. Requires KiCad installed.