Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx agentmods add skills/iot-forge/m5stack-skills/esp32-s3npx skills add iot-forge/m5stack-skills --skill esp32-s3git clone --depth 1 https://github.com/iot-forge/m5stack-skillsWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/iot-forge/m5stack-skills/esp32-s3)<a href="https://agentmods.dev/skills/iot-forge/m5stack-skills/esp32-s3"><img src="https://agentmods.dev/badge/skills/iot-forge/m5stack-skills/esp32-s3.svg" alt="Measured on agentmods" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5 | $0.00308 | $0.02929 |
| Opus 5 | $0.00154 | $0.01465 |
| Sonnet 5 | $0.00062 | $0.00586 |
| Haiku 4.5 | $0.00031 | $0.00293 |
Grade A, and why
esp32-s3 scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 4d ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 150 lines — stays where its author put it; the contents beside it link to each section on GitHub.
ESP32-S3 chip capabilities
This skill is the chip layer, not a board layer. A board skill (e.g.
m5stack-cardputer-adv) tells you what's wired to what on one specific
product; this skill tells you what the ESP32-S3 silicon itself can do —
the peripherals, low-power modes, memory options, and concurrency model
that are the same on every ESP32-S3 board regardless of vendor. Read a
board's own skill first for pin numbers and I2C addresses, then come here
when the user wants to go deeper on a capability than "call the vendor's
high-level library and move on" — e.g. writing a custom RMT-based protocol,
tuning deep-sleep wake behavior, pinning tasks to cores, or getting real
throughput out of I2S/USB.
Not classic ESP32, not S2, not C3/C6/C5, not H2, not P4
M5Stack (and the ESP32 family generally) spans several very different chips that are easy to conflate. Get this wrong and code silently targets the wrong architecture or assumes a peripheral that doesn't exist.
| Chip | Cores / arch | Wireless | Native USB | Notable extras | Not on this chip |
|---|---|---|---|---|---|
| ESP32-S3 (this skill) | 2× Xtensa LX7 @ up to 240MHz + 1 low-power coprocessor core | WiFi 4 (2.4GHz only) + BLE 5 | Yes — OTG + separate USB-Serial-JTAG | SIMD/vector instructions for AI (esp-dsp/ESP-DL/TFLite Micro), ULP-RISC-V and ULP-FSM | Thread/Zigbee/802.15.4, WiFi 6, MIPI-DSI/CSI |
| ESP32 (classic) | 2× Xtensa LX6 @ 240MHz | WiFi 4 + Bluetooth Classic + BLE 4.2 | No | Widest library/example coverage, oldest silicon | Native USB, SIMD extensions, ULP-RISC-V |
| ESP32-S2 | 1× Xtensa LX7 @ 240MHz | WiFi 4 only, no Bluetooth at all | Yes — OTG | Very low deep-sleep current | Second core, Bluetooth |
| ESP32-C3 | 1× RISC-V @ 160MHz | WiFi 4 + BLE 5 | No | Cheapest/smallest | Second core, native USB, SIMD |
| ESP32-C6 | 1× RISC-V @ 160MHz + LP core | WiFi 6 (2.4GHz) + BLE 5.3 + Thread/Zigbee (802.15.4) | No | First ESP32 with WiFi 6 + Matter-ready radio stack | Second core, native USB, hardware FPU |
| ESP32-C5 | 1× RISC-V @ 240MHz + LP core | WiFi 6 dual-band (2.4+5GHz) + BLE 5 + 802.15.4 | No | Only dual-band-WiFi6 ESP32 variant | Second core, native USB |
| ESP32-H2 | 1× RISC-V @ 96MHz | No WiFi — BLE 5 + Thread/Zigbee only | No | Purpose-built low-power mesh/Matter radio | WiFi entirely, second core |
| ESP32-P4 | 2× RISC-V @ 400MHz + LP core | No radio at all | Yes — OTG (high-speed) | MIPI-DSI/CSI, H.264 encode, up to 32MB in-package PSRAM, most raw CPU power | Any wireless — always pairs with a companion chip (M5Stack's Tab5 pairs it with a C6) |
What ships with it
4 files beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 4d ago First seen · 150 lines · 308 tokens per session scan A 08ac6c804a6d
esp32-s3 is a skill published in the GitHub repository iot-forge/m5stack-skills (2 stars, last pushed 10d ago), licensed MIT. It adds 308 tokens to every session and 2,929 once invoked, about $0.0015 per session on Opus 5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-31.
Other skills, from other repositories
sticky-device
Hardware facts, ESP-IDF firmware patterns, ePaper/touch APIs, and Playground publishing rules for the Seeed Studio reTerminal Sticky (ESP32-S3, 3.97" 800x480 e-ink). Use when working on reTerminal Sticky or "Sticky" firmware, apps, pin assignments, display refresh, touch gestures, deep sleep, ESPHome/Home Assistant…
ble
Operate ESP-Claw BLE: initialize BLE, advertise, handle connections, process events, and inspect module state.
nucleo-native-app
Scaffold and implement a NucleoOS native firmware app (C++) correctly — anti-flicker, poll handler, RAM discipline, input routing, registration. Use when creating or fixing a native app in firmware/components/nucleoapp/.
nucleo-release-dual
Build and ship NucleoOS to BOTH Cardputer units — the original and the ADV — in one pass. Use when the user wants to release/build/OTA/flash for both boards, the ADV and non-ADV Cardputers, or two devices at once. Encodes the key fact that it's ONE universal binary (runtime board auto-detect), so you build once and…
nucleo-release
Build, gate, and ship NucleoOS to the Cardputer — firmware via OTA and the web/SD payload via the device file API. Use when the user asks to release, deploy, flash, OTA, sync the SD, or push a web app to the device. Covers the one-command release, firmware-only and SD-only paths, and the gotchas (PIN, .gz shadowing…
cap_router_mgr
Manage router automation rules: list/get/add/update/delete/reload with strict rulejson format.