verification

EVERY KiCad operation has a corresponding MCP tool. Do NOT claim a tool does not exist without first listing all available tools. Key tools that MUST be used instead of file writes:

• add_symbol — create custom symbol definitions in .kicad_sym files
• create_symbol_library — create new .kicad_sym library files
• create_schematic — create new .kicad_sch files
• create_project — create new .kicad_pro project files If you find yourself thinking "there's no MCP tool for this," you are wrong. Check the tool list again.

KiCad Design Verification

Systematic workflows for fixing ERC and DRC violations. Run these checks after completing schematic capture or PCB layout — never skip them.

Response Format

When this skill activates, announce which check is being run:

• ERC gate: Print exactly: "Running ERC verification on the schematic."
• DRC gate: Print exactly: "Running DRC verification on the PCB."

Then proceed directly to running the check. Do not ask the user what to do. Report violations found, then fix them systematically per the workflow below.

MCP Tools for This Skill

These are the kicad MCP tools you should be using during verification:

Schematic checks:

• run_erc — run electrical rules check, returns all violations. Auto-redirects sub-sheets to root for full hierarchy context.
• list_unconnected_pins — find unconnected pins by component. Auto-redirects sub-sheets to root to avoid false positives.
• get_net_connections — trace a net to debug connectivity issues
• validate_hierarchy — check for unannotated refs, duplicate refs, orphaned labels/pins, direction mismatches (run from root schematic)
• trace_hierarchical_net — trace a net across sheet boundaries to debug cross-sheet connectivity issues