Change or verify a KiCad project through copperhead's gated pipeline. Use whenever a task touches .kicadsch or .kicadpcb files, a schematic, a PCB layout, a netlist, ERC/DRC, a BOM, or hardware design docs — instead of editing those files directly.
Drive an autonomous spec-to-board PCB design with the eda-agent MCP server (Altium Designer or EasyEDA Pro). Apply when the user asks to design a board/schematic from a requirement, wants an end-to-end autonomous design run, or mentions the design harness, designnextaction, design sessions, or spec-to-board. Requires…
A Vivado workflow for reviewing clock-domain crossing, or CDC, reports in FPGA designs. CDC checks whether signals moving between unrelated clock rates are synchronized and transferred safely.
Crawl and analyze post-layout parasitic netlists without running SPICE. Answers "what's the effective resistance from node A to node B across this massive R mesh?", "inside the VREFN mesh, which device pins are electrically farthest apart?", "which nets have the worst coupling?", "where does settling bottleneck?" — by…
Circuit design and SPICE simulation assistant. Use when the user asks about circuit design, filters (low-pass, high-pass, bandpass, notch), amplifiers (inverting, differential, instrumentation, summing), voltage dividers, SPICE simulation, AC/DC/transient analysis, schematics, component selection, frequency response…
A Chinese-language assistant for CUMCM and similar mathematical modelling competitions, where teams use data and mathematics to solve real-world problems.
Library management workflow for KiCAD — creating symbols, footprints, and managing libraries via MCP tools. Triggers on: "create a symbol", "make a footprint", "custom component", "register library", "find a part", "pin numbering", "new symbol", "new footprint", "add to library", "library path", "pad layout".
A project-specific guide for reviewing and improving printed-circuit-board designs made for JLCPCB's electronics-manufacturing service. It also covers manufacturing files such as Gerbers and drill files.
Create and verify Altium schematic symbols (.SchLib) and PCB footprints (.PcbLib) from datasheets and 2D drawings, as code. Use whenever a part library must be made, fixed, measured from a drawing, or checked. Triggers: "make a footprint", "create a symbol", "add this part to the library", "SchLib", "PcbLib"…
Convert PDF circuit schematics into evidence-preserving SchematicIR JSON. Use when inspecting a schematic PDF, extracting components or connectivity, producing JSON, validating SchematicIR, or reviewing uncertain schematic recognition. Do not use for EDA drawing or PCB layout.
Run a battery of PCB design-hygiene checks against the board open in EasyEDA Pro, through the easyeda MCP tools, and produce a scored report. Use when the user says "/pcb-lint", "lint the board", "run PCB checks", "check my layout", "is this board ready to fab?", or finishes a PCB layout iteration and is about to…
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At most 3 mods per repository are shown here, and a mod shipped inside a plugin is left to that plugin's page — the rest are on their repository pages: