Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx agentmods add skills/tensormux/kernel-skills/optimize-global-memory-accessnpx skills add tensormux/kernel-skills --skill optimize-global-memory-accessgit clone --depth 1 https://github.com/tensormux/kernel-skillsWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/tensormux/kernel-skills/optimize-global-memory-access)<a href="https://agentmods.dev/skills/tensormux/kernel-skills/optimize-global-memory-access"><img src="https://agentmods.dev/badge/skills/tensormux/kernel-skills/optimize-global-memory-access.svg" alt="Measured on agentmods" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00000 | $0.03210 |
| Opus 5 | $0.00000 | $0.01605 |
| Sonnet 5 | $0.00000 | $0.00642 |
| Haiku 4.5 | $0.00000 | $0.00321 |
Grade A, and why
optimize-global-memory-access scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 6d ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 104 lines — stays where its author put it; the contents beside it link to each section on GitHub.
Skill: Optimize Global Memory Access
Purpose
Guide the agent through diagnosing and restructuring CUDA global memory access patterns to maximize effective memory bandwidth, covering coalescing requirements, vectorized loads, AoS vs SoA layouts, shared memory staging for non-coalesced patterns, and L2 cache behavior.
Use this when
- A kernel's measured memory bandwidth is significantly below device peak (e.g., less than 60% of theoretical peak on an HBM device)
- Profiling shows high "global memory load/store efficiency" warnings in Nsight Compute, or a high ratio of L2 transactions per access
- The kernel accesses memory with strides, transposed layouts, or irregular patterns
- You are redesigning a data structure layout to improve access locality across kernels
- A new kernel is being written and the access pattern needs to be designed from scratch for maximum coalescing
Do not use this when
- The kernel is compute-bound (arithmetic intensity is high relative to the roofline): improving memory access will not help until the compute bottleneck is addressed
- The access pattern is inherently random (e.g., sparse gather/scatter with unpredictable indices): coalescing restructuring has limited benefit and may not be worth the code complexity
- The data fits in L1/L2 cache across the full kernel launch: memory bandwidth to DRAM is not the bottleneck
Inputs the agent should gather first
- Access pattern description: for each global memory read and write in the kernel, what is the relationship between
threadIdxand the memory address? Is the stride between consecutive threads 1, a constant, or data-dependent? - Tensor shape and layout: are tensors row-major (C-contiguous) or column-major (Fortran-contiguous)? What are the leading dimension strides?
- Dtype and element size: fp32 (4 bytes), fp16 (2 bytes), int8 (1 byte) — determines how many elements fit in one cache line (128 bytes / element_size)
- Pointer alignment: are base pointers guaranteed 16-byte (or 128-byte) aligned? This determines which vectorized load widths are safe
- Access frequency: is this access in the inner loop or the outer setup? How many times is each element loaded (reuse factor)?
- Hardware target: SM architecture, for cache line size (128 bytes on all modern NVIDIA GPUs), L2 cache size, and memory bus width
What ships with it
1 file beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 6d ago First seen · 104 lines · 0 tokens per session scan A b149b685eaa3
optimize-global-memory-access is a skill published in the GitHub repository tensormux/kernel-skills (73 stars, last pushed 2mo ago), licensed MIT. It costs nothing until one of its globs matches a file; then it loads 3,210 tokens. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-30.
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