kicad-happy is a collection of coding-agent skills and tools that inspect KiCad schematics, PCB layouts, and Gerber files for electronics design issues. It is for hardware designers who want automated reviews, simulations, datasheet checks, component sourcing, and fabrication preparation. The catalogue entries are its agent skills, rules, plugin, and instruction for integrating this workflow with coding agents.
Getting it into your agent
It runs from inside its repository, so the clone comes first — what it calls does not travel with the file alone.
git clone --depth 1 https://github.com/aklofas/kicad-happynpx agentmods add skills/aklofas/kicad-happy/jlcpcbWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/aklofas/kicad-happy/jlcpcb)<a href="https://agentmods.dev/skills/aklofas/kicad-happy/jlcpcb"><img src="https://agentmods.dev/badge/skills/aklofas/kicad-happy/jlcpcb/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/aklofas/kicad-happy/jlcpcb"><img src="https://agentmods.dev/badge/skills/aklofas/kicad-happy/jlcpcb.svg" alt="Reviewed on agentmods" width="80" height="20"></a>- Socket pass
- Snyk pass
- NVIDIA SkillSpector pass
What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00113 | $0.02802 |
| Opus 5.5 | $0.00045 | $0.01121 |
| Sonnet 5.5 | $0.00023 | $0.00560 |
| Haiku 4.5 | $0.00011 | $0.00280 |
Grade A, and why
jlcpcb scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 1mo ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 234 lines — stays where its author put it; the contents beside it link to each section on GitHub.
JLCPCB — PCB Fabrication & Assembly
JLCPCB is a PCB fabrication and assembly service based in Shenzhen, China. It is a sister company to LCSC Electronics (common ownership) — they share the same parts library.
Typical usage: Order bare prototype PCBs + framed stencil from JLCPCB during prototyping (parts sourced separately from DigiKey/Mouser, hand-assembled in lab). For production runs (100s qty), order fully assembled boards from JLCPCB using LCSC parts. PCBWay is an alternative assembler. For component searching, see the lcsc skill. For BOM management, gerber/CPL export, and stencil ordering, see the bom skill.
Related Skills
| Skill | Purpose |
|---|---|
kicad |
Read/analyze KiCad project files, DFM scoring against JLCPCB capabilities |
bom |
BOM management, gerber/CPL export, stencil ordering |
digikey |
Search DigiKey (prototype sourcing, primary — also preferred for datasheet downloads via API) |
mouser |
Search Mouser (prototype sourcing, secondary) |
lcsc |
Search LCSC (production sourcing — JLCPCB uses LCSC parts library) |
pcbway |
Alternative PCB fabrication & assembly |
emc |
EMC pre-compliance risk analysis — run before fab to catch EMC issues |
spice |
SPICE simulation — verify analog subcircuits before committing to fab |
Assembly Parts Library
Part Categories
| Category | Description | Assembly Fee |
|---|---|---|
| Basic | Common parts (resistors, caps, diodes, common ICs) pre-loaded on pick-and-place machines | No extra fee |
| Extended | 300k+ less common parts loaded on demand | $3 per unique extended part |
JLCPCB occasionally promotes a subset of frequently-used extended parts with a discounted or waived feeder fee (the program's name and terms shift over time). Check the current JLCPCB parts library page for any specific extended part before assuming the standard $3 fee applies.
LCSC Part Numbers
Every assembly component is identified by an LCSC Part Number (Cxxxxx, e.g., C14663). This is the definitive identifier for BOM matching. See the lcsc skill for searching parts.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 1mo ago First seen · 234 lines · 113 tokens per session scan A dd80d54932c1
jlcpcb is a skill published in the GitHub repository aklofas/kicad-happy (1,504 stars, last pushed yesterday), licensed MIT. It adds 113 tokens to every session and 2,802 once invoked, about $0.0005 per session on Opus 5.5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-30.
Other skills, from other repositories
kicad-jlcpcb-workflow
Use this skill when the user asks to "design a PCB", "make a board", "build a PCB project", "order from JLCPCB", "create a schematic", "source LCSC parts", "wire up a board", "generate a PCB from a BOM", or any KiCad + JLCPCB workflow. Also use when working with .kicadpro or .kicadpcb files. Handles project setup…
pcb-layout
Use when placing footprints on a PCB, routing traces, adding vias or copper zones, deciding trace widths, or planning board layout strategy. Also use when the user asks about PCB stackup, ground planes, trace spacing, or component placement on a board.
schematic-design
Use when executing a schematic placement plan (plan mode) or modifying an existing schematic (modification mode).
verification
Use when running ERC or DRC checks, fixing electrical or design rule violations, debugging unconnected nets, resolving "power pin not driven" errors, or preparing a design for manufacturing export. Also use when the user says "my ERC has errors" or "DRC is failing.".
circuit-design
Use when designing an electronic circuit from requirements, choosing topology or regulator type, selecting component values, planning protection circuits, or deciding what goes on a board before schematic capture begins. Also use when the user asks "what components do I need" or "how should I power this.".
using-kicad
Use when starting any conversation involving electronics, KiCad, PCB design, schematic capture, circuit design, or EDA tasks.