kicad-happy is a collection of coding-agent skills and tools that inspect KiCad schematics, PCB layouts, and Gerber files for electronics design issues. It is for hardware designers who want automated reviews, simulations, datasheet checks, component sourcing, and fabrication preparation. The catalogue entries are its agent skills, rules, plugin, and instruction for integrating this workflow with coding agents.
Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx skills add aklofas/kicad-happy --skill pcbwaygit clone --depth 1 https://github.com/aklofas/kicad-happyWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/aklofas/kicad-happy/pcbway)<a href="https://agentmods.dev/skills/aklofas/kicad-happy/pcbway"><img src="https://agentmods.dev/badge/skills/aklofas/kicad-happy/pcbway/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/aklofas/kicad-happy/pcbway"><img src="https://agentmods.dev/badge/skills/aklofas/kicad-happy/pcbway.svg" alt="Reviewed on agentmods" width="80" height="20"></a>- NVIDIA SkillSpector pass
- Socket pass
- Snyk warn
What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00119 | $0.02230 |
| Opus 5.5 | $0.00048 | $0.00892 |
| Sonnet 5.5 | $0.00024 | $0.00446 |
| Haiku 4.5 | $0.00012 | $0.00223 |
Grade A, and why
pcbway scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 1mo ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 180 lines — stays where its author put it; the contents beside it link to each section on GitHub.
PCBWay — PCB Fabrication & Assembly
PCBWay is a PCB fabrication and assembly service based in Shenzhen, China. It is an alternative to JLCPCB with similar capabilities and pricing.
Typical usage: Order bare prototype PCBs + framed stencil from PCBWay during prototyping (parts sourced separately from DigiKey/Mouser, hand-assembled in lab). For production runs (100s qty), order fully assembled boards from PCBWay using turnkey component sourcing (PCBWay sources parts by MPN). JLCPCB is the primary alternative. For BOM management, gerber/CPL export, and stencil ordering, see the bom skill.
Related Skills
| Skill | Purpose |
|---|---|
kicad |
Read/analyze KiCad project files, DFM scoring |
bom |
BOM management, gerber/CPL export, stencil ordering |
digikey |
Search DigiKey (prototype sourcing, primary — also preferred for datasheet downloads via API) |
mouser |
Search Mouser (prototype sourcing, secondary) |
lcsc |
Search LCSC (production sourcing, JLCPCB parts) |
jlcpcb |
JLCPCB PCB fabrication & assembly (primary alternative) |
emc |
EMC pre-compliance risk analysis — run before fab to catch EMC issues |
spice |
SPICE simulation — verify analog subcircuits before committing to fab |
Key Differences from JLCPCB
| Feature | PCBWay | JLCPCB |
|---|---|---|
| Component sourcing | Turnkey (PCBWay sources by MPN) | LCSC parts library (you provide LCSC PNs) |
| Parts library | No fixed library — sources globally | LCSC library (basic/extended parts) |
| Assembly fee model | Quote-based per project | Per-part fees (basic free, extended $3 each) |
| Pricing turnaround | Manual quote, 1–2 business days | Instant online pricing |
| BOM format | MPN-based (manufacturer part numbers) | LCSC PN-based |
Plan around manual quoting. PCBWay assembly requires a human-reviewed quote before you can place the order — typically 1-2 business days after uploading files. JLCPCB shows assembly pricing instantly at checkout. If you're prototyping and need to iterate quickly, the JLCPCB feedback loop is much tighter. PCBWay's value is in sourcing parts JLCPCB can't, not in turnaround speed.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 1mo ago First seen · 180 lines · 119 tokens per session scan A a1675ac9dee6
pcbway is a skill published in the GitHub repository aklofas/kicad-happy (1,504 stars, last pushed yesterday), licensed MIT. It adds 119 tokens to every session and 2,230 once invoked, about $0.0005 per session on Opus 5.5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-30.
Other skills, from other repositories
kicad-jlcpcb-workflow
Use this skill when the user asks to "design a PCB", "make a board", "build a PCB project", "order from JLCPCB", "create a schematic", "source LCSC parts", "wire up a board", "generate a PCB from a BOM", or any KiCad + JLCPCB workflow. Also use when working with .kicadpro or .kicadpcb files. Handles project setup…
pcb-layout
Use when placing footprints on a PCB, routing traces, adding vias or copper zones, deciding trace widths, or planning board layout strategy. Also use when the user asks about PCB stackup, ground planes, trace spacing, or component placement on a board.
schematic-design
Use when executing a schematic placement plan (plan mode) or modifying an existing schematic (modification mode).
verification
Use when running ERC or DRC checks, fixing electrical or design rule violations, debugging unconnected nets, resolving "power pin not driven" errors, or preparing a design for manufacturing export. Also use when the user says "my ERC has errors" or "DRC is failing.".
circuit-design
Use when designing an electronic circuit from requirements, choosing topology or regulator type, selecting component values, planning protection circuits, or deciding what goes on a board before schematic capture begins. Also use when the user asks "what components do I need" or "how should I power this.".
using-kicad
Use when starting any conversation involving electronics, KiCad, PCB design, schematic capture, circuit design, or EDA tasks.