rtl-p3-uarch-policy

Phase 3 μArch Design Policy

Document Requirements (per-module docs/phase-3-uarch/*.md)

Each module document MUST contain:

1. Module decomposition: sub-modules with rationale (or single-module rationale)
2. Clock domain assignment: per sub-block, with synchronizer specs for cross-domain
3. Protocol assignment: per interface with justification (data rate, latency, backpressure)
4. Design partitioning: pipeline stages, resource sharing, parallelism degree
5. Register/SRAM/FSM allocation: pipeline regs, config regs, SRAM capacity+banking, FSM state count
6. Inter/intra-module pipeline: data flow, handshake, backpressure, hazard analysis
7. Signal naming: compliant with conventions below

REQ→uArch Reverse Traceability

Every P3 run MUST produce docs/phase-3-uarch/req-uarch-traceability.md mapping each requirement from docs/phase-1-research/iron-requirements.json (REQ-F-, REQ-P-) and docs/phase-2-architecture/iron-requirements.json (REQ-A-*) to the uArch module(s) and section(s) implementing it.

Format:

| REQ ID   | uArch Module(s)         | Section(s)                  | Status   |
|----------|-------------------------|-----------------------------|----------|
| REQ-001  | intra_pred              | 3.2 Mode Decision FSM       | MAPPED   |
| REQ-002  | deblock_filter, sao     | 2.1 Pipeline, 4.3 SAO Ctrl  | MAPPED   |
| REQ-003  | —                       | —                           | UNMAPPED |

• 100% coverage required: every REQ-NNN must appear. UNMAPPED REQs block the Phase 3 gate.
• Staleness detection: when P1 iron-requirements.json changes after P3 completion, this table identifies which uArch sections need re-design. The P3 orchestrator uses mtime comparison to detect staleness.

Clock Domain Assignment Rules

• Every sub-block MUST have an assigned clock domain
• Single-domain: clk / rst_n
• Multi-domain: {domain}_clk / {domain}_rst_n (e.g., sys_clk, pixel_clk)
• Cross-domain interfaces: explicit synchronizer type (2FF, handshake, async FIFO)
• Clock domain map: documented per module (which blocks share clocks, which cross)