rtl skills

Eriemon/verilog-generator

Skill Codex

Use when creating, writing, reviewing, annotating, repairing, refactoring, or validating readable Verilog RTL, including synthesizable Verilog-2001 .v files, existing-RTL analysis, semantic comment annotation, testbench scaffold planning, ASIC-quality review, local or remote Vivado/xsim validation, evidence-backed…

aviz85/claude-skills-library

Skill Claude Code

Convert HTML to PDF with pixel-perfect rendering and excellent Hebrew/RTL support. Use when the user asks to 'convert HTML to PDF', 'generate PDF from HTML', 'create PDF from webpage', 'export to PDF', or needs PDF generation with Hebrew text support.

cobbpeng/fpga-hardware-design-and-review-guide

Skill Claude Code

Comprehensive FPGA hardware design guide based on real-world project experience. Covers pipeline architecture, timing optimization, SystemVerilog coding patterns, CDC handling, and practical debugging techniques. Use this skill when: (1) designing FPGA modules with timing constraints, (2) implementing video processing…

phamcuong21478/rtl-skills

Skill Claude Code

Generate a design proposal, documentation, and RTL backbone from a requirement file.

kws-projects/react-boilerplate

Skill Cursor

Work with the GA4 analytics and Sentry error-monitoring integrations in this project. Use when adding events, capturing errors, configuring user identity, managing consent, or troubleshooting the integration.