agentmods.dev

chip-design skills

11 tagged chip-design, measured the same way as everything else here.

Browse within: rtl-design 22systemverilog 22claude-code-plugin 12rtl 10verilog 10

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vf-rtl

01

bjwanneng/veriflow-cc

Skill Claude CodeCodex

Use this skill to start or resume the VeriFlow RTL hardware design pipeline (architect to synth). Trigger this when the user asks to "run the RTL flow", "design hardware", or "start the pipeline". Pass the project directory path as the argument. Optional: append --benchmark to auto-generate a benchmark report after…

not rated 54 +2 12d ago B 0 tokens

vdesign

02

phamcuong21478/rtl-skills

Skill Claude Code

Generate a design proposal, documentation, and RTL backbone from a requirement file.

not rated 16 4mo ago A 17 tokens original Apache-2.0

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