11 tagged verilog, measured the same way as everything else here.
Browse within: rtl 11chip-design 10rtl-design 10systemverilog 10
Skill Claude CodeCodex
Use when creating, writing, reviewing, annotating, repairing, refactoring, or validating readable Verilog RTL, including synthesizable Verilog-2001 .v files, existing-RTL analysis, semantic comment annotation, testbench scaffold planning, ASIC-quality review, local or remote Vivado/xsim validation, evidence-backed…
Skill Claude CodeCodex
Decompose an IP requirement into submodules, define interfaces, and generate an architecture document plus per-module requirement files and a top-level skeleton.
Skill Claude CodeCodex
Generate a design proposal, documentation, and RTL backbone from a requirement file.
Skill Claude CodeCodex
Implement Verilog code from an approved design proposal, then lint and simulate.