Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx skills add hdl-tools/analog-chip-design-agents --skill post-layout-signoffgit clone --depth 1 https://github.com/hdl-tools/analog-chip-design-agentsWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/hdl-tools/analog-chip-design-agents/post-layout-signoff)<a href="https://agentmods.dev/skills/hdl-tools/analog-chip-design-agents/post-layout-signoff"><img src="https://agentmods.dev/badge/skills/hdl-tools/analog-chip-design-agents/post-layout-signoff/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/hdl-tools/analog-chip-design-agents/post-layout-signoff"><img src="https://agentmods.dev/badge/skills/hdl-tools/analog-chip-design-agents/post-layout-signoff.svg" alt="Reviewed on agentmods" width="80" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00079 | $0.02147 |
| Opus 5 | $0.00039 | $0.01073 |
| Sonnet 5 | $0.00016 | $0.00429 |
| Haiku 4.5 | $0.00008 | $0.00215 |
Grade A, and why
post-layout-signoff scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 11d ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 217 lines — stays where its author put it; the contents beside it link to each section on GitHub.
Skill: Post-Layout Sign-off
Invocation
- If invoked by a user presenting a post-layout sign-off task: immediately spawn the
analog-chip-design-agents:post-layout-signoff-orchestratoragent and pass the full user request and any available context. Do not execute stages directly. - If invoked by the
post-layout-signoff-orchestratormid-flow (including re-validation): do not spawn a new agent. Treat this file as read-only — return the requested stage rules, sign-off criteria, or loop-back guidance.
Spawning the orchestrator from within an active orchestrator run causes recursive delegation and must never happen.
Pre-run Context
Before executing or advising on any stage, read the following if they exist:
memory/post-layout/knowledge.md— known parasitic-degradation patterns, stability/CMRR loss recipes, corner re-sim pitfalls. Incorporate its guidance into every analysis.memory/post-layout/run_state.md— current run identity for resume-after-interruption.
Purpose
Close the design on the extracted (PEX) netlist: re-run corners/Monte-Carlo, re-verify specs
versus the pre-layout design, quantify parasitic degradation, and gate tape-out. Five stages
with explicit QoR gates. On a post-layout spec loss the sign-off cannot absorb, this domain
opens a fix_request routed to custom-layout (parasitic reduction) or circuit-design
(re-design). The final tapeout_signoff stage is a human-approval checkpoint.
Supported EDA Tools
Open-Source
- ngspice (
ngspice) / Xyce (Xyce) — corner/MC simulation on the extracted netlist - PySpice (
python -m PySpice) — scripted corner / Monte-Carlo orchestration and post-processing
Proprietary (detect-only — never installed)
- Cadence Spectre / Spectre X / APS (
spectre) - Synopsys PrimeSim / FineSim (
primesim) - Siemens AFS (Analog FastSPICE) (
afs)
Stage: pex_netlist_assembly
Domain Rules
- Assemble the post-layout testbench around the PEX netlist from
design_state.pex.netlist, reusing the pre-layout.measuretestbench so specs compare like-for-like. - Confirm device/net names map between the PEX netlist and the testbench; resolve any unmapped probes.
- Include the PDK model corners and the sign-off corner set from
constraints.corners.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 11d ago First seen · 217 lines · 79 tokens per session scan A 9b30c092f7e7
post-layout-signoff is a skill published in the GitHub repository hdl-tools/analog-chip-design-agents (22 stars, last pushed 3mo ago), licensed MIT. It adds 79 tokens to every session and 2,147 once invoked, about $0.0004 per session on Opus 5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-30.
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