Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx skills add raisoninme/boardless-pcb --skill step2-pinmapgit clone --depth 1 https://github.com/raisoninme/boardless-pcbWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/raisoninme/boardless-pcb/step2-pinmap)<a href="https://agentmods.dev/skills/raisoninme/boardless-pcb/step2-pinmap"><img src="https://agentmods.dev/badge/skills/raisoninme/boardless-pcb/step2-pinmap.svg" alt="Measured on agentmods" height="20"></a>What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00026 | $0.01008 |
| Opus 5 | $0.00013 | $0.00504 |
| Sonnet 5 | $0.00005 | $0.00202 |
| Haiku 4.5 | $0.00003 | $0.00101 |
Grade A, and why
step2-pinmap scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 8d ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 34 lines — stays where its author put it; the contents beside it link to each section on GitHub.
Step 2 · Firmware skeleton / pin map freeze
Session & state check (before touching anything)
- One step per session: if this session already did substantive work for another step, stop and ask for a fresh session.
- Read
docs/flow-state.md(recognize it by its canonical header line; a foreign file under this name → stop and ask). Missing → route the user to step1-onboard (Claude Code:/boardless-pcb:step1-onboard). Confirm step 1 isdone; readdocs/requirements.md+docs/dev-plan.md. Not satisfied → stop and report; never skip ahead. - This step already
donewith no issue targeting it → re-run: ask the user's intent before redoing anything. Alreadyin-progress→ a previous session aborted or another session is live: ask before proceeding. Markedrework→ redo what the rework note in its row requires, then wrap up. - Issues-table entries with target step = 2 → fix mode (below).
- Set step 2
in-progress. Rebuild context from disk only; rely on no conversation memory.
Execute
Adopt-and-audit path: if flow-state/requirements record an inherited pin map (inherited: <path>), do not re-derive it — ingest it into this flow's carriers (pin-map carrier + docs/pinmap.md), then audit at the depth its trust level prescribes: verified-rely-on → dual-source spot-check of the critical pins (boot/strapping, wake sources, bus sharing, reset defaults); reference-only → full dual-source verification of every pin. Inheritance changes the labor, never the bar: the checklist below, the gate, and the done criteria apply unchanged — an inherited pin map is a memory-grade prior, and priors only qualify as triggers for checks.
- Pin layer fully realized: gate polarities (active-low/high); if the design sleeps and wakes — your platform's wake semantics (level-triggered wake is not an edge event; e.g. on ESP32's EXT1 ANY_LOW mask, a pin currently low must never enter the mask — check the target MCU's equivalent rules); boot-mode/strapping-class pin constraints; bus sharing; every pin's reset default state with its safety implications.
- Input pins at a boundary where their driver's domain may power down get default pull resistors (a floating input invites shoot-through current).
- Business logic interface-only: control logic and modules as skeletons with frozen signatures; details iterate in step 7. Firmware at this step exists to produce pin constraints.
- Pin-level decision code must prove its pins are configured (idempotent reconfigure + guard assertions), with the rule captured in host unit tests.
- Dual-source verification for every pin: official datasheet page-by-page × EDA symbol library; the datasheet wins on conflict; log each check (pin, both sources, verdict) into the pinmap doc.
What ships with it
1 file beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 8d ago First seen · 34 lines · 26 tokens per session scan A 9a758fdff37d
step2-pinmap is a skill published in the GitHub repository raisoninme/boardless-pcb (2 stars, last pushed 25d ago), licensed MIT. It adds 26 tokens to every session and 1,008 once invoked, about $0.0001 per session on Opus 5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-31.
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