Getting it into your agent
It runs from inside its repository, so the clone comes first — what it calls does not travel with the file alone.
git clone --depth 1 https://github.com/vibeic/vibe-icnpx agentmods add skills/vibeic/vibe-ic/spec-to-rtlWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/vibeic/vibe-ic/spec-to-rtl)<a href="https://agentmods.dev/skills/vibeic/vibe-ic/spec-to-rtl"><img src="https://agentmods.dev/badge/skills/vibeic/vibe-ic/spec-to-rtl/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/vibeic/vibe-ic/spec-to-rtl"><img src="https://agentmods.dev/badge/skills/vibeic/vibe-ic/spec-to-rtl.svg" alt="Reviewed on agentmods" width="80" height="20"></a>- NVIDIA SkillSpector pass
What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00317 | $0.11575 |
| Opus 5.5 | $0.00127 | $0.04630 |
| Sonnet 5.5 | $0.00063 | $0.02315 |
| Haiku 4.5 | $0.00032 | $0.01158 |
Grade A, and why
spec-to-rtl scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured today.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
How it starts
The opening of the file, as written. The whole thing — 786 lines — stays where its author put it; the contents beside it link to each section on GitHub.
spec-to-rtl — the runner-orchestrated AI authoring step
What this skill IS
The deterministic authoring path for IC classes WITHOUT a registered rtl_gen
generator. Spec → RTL fundamentally requires a language model (open-benchmark-
methodology skill § 1); this skill is how the runner delegates that step to
the AI inside its own pipeline, so the surrounding gates still fire.
Invocation contract
When design_one_shot_runner.step_rtl_gen WAIVES with the message:
IC class 'XXX' registered but rtl_gen=null. Recommended action: AI invokes skill
spec-to-rtl.
…the AI MUST:
-
Read the input contract named by the runner handoff. For the explicit bounded Step 1/2
input_authority=originalcontract, read the entireread_prompt_fromfile and everyread_context_fromfile. Verify their recorded SHA-256 values before authoring or reviewing. These are the authoritative source bytes; do not substitute generated Ldocs or require a D1 document review for this RTL-only request. A changed or missing source requires returning to the ordinary runner, not silently adopting it. This handoff asserts neither D1 PASS nor measured RTL behavior.For the default structured contract, read the L docs the runner emitted:
<project>/phase1/generated_docs/L1_*.json(product metadata, IC name, target clock)<project>/phase1/generated_docs/L2_*.json(functional spec)<project>/phase1/generated_docs/L3_*.json(external interface — ports)<project>/phase1/generated_docs/L7_*.json(verification plan / truth-tables)<project>/phase1/generated_docs/L9_*.json(constraints, top_module name, top_ports)- For Path-A (NL prompt) projects, ALSO read the original prompt at
<project>/input/phase1_prompt.mdor<project>/input/docs/*.md. The prompt typically has clearer port-name and behavioral details than the auto-extracted L docs. - When the handoff supplies verified
public_original_input_paths, ALSO read those original RTL and context files. Preserve their exact interface and supplied behavior while applying the prompt's requested completion or change; use the same authoring method below with these source inputs.
What ships with it
2 files beside SKILL.md in the same directory: the scripts, references and assets a skill reads on demand. Not counted in the per-session cost; read them before you install if any of them is executable.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- today Changed · +14 lines d69cfc350d09
- 28d ago Changed · +16 lines 045d888f3263
- 1mo ago Changed · +35 lines 185d5b4692df
- 1mo ago Changed · +28 lines abbe00c96283
- 1mo ago Changed · +135 lines 303352fca41c
- 1mo ago Changed · +53 tokens per session 79709c8d8543
- 1mo ago First seen · 558 lines · 264 tokens per session scan A 712876385387
spec-to-rtl is a skill published in the GitHub repository vibeic/vibe-ic (28 stars, last pushed today), licensed Apache-2.0. It adds 317 tokens to every session and 11,575 once invoked, about $0.0013 per session on Opus 5.5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-09-03.
Other skills, from other repositories
analog-netlist-crawl
Crawl and analyze post-layout parasitic netlists without running SPICE. Answers "what's the effective resistance from node A to node B across this massive R mesh?", "inside the VREFN mesh, which device pins are electrically farthest apart?", "which nets have the worst coupling?", "where does settling bottleneck?" — by…
analog-verify
Pre-simulation review and Spectre simulation verification for analog circuits. Reviews circuit netlist and testbench, runs simulation, produces margin report. Use after analog-design completes a netlist.
analog-design
Transistor-level circuit design for one analog sub-block. Produces Spectre netlist with hand-calculation rationale. Use when designing a specific circuit block after architecture is defined.
analog-pipeline
MANDATORY — MUST load this skill when the user mentions: OTA, ADC, PLL, comparator, bandgap, LDO, amplifier, opamp, or any analog/mixed-signal IC design task. Full analog design pipeline: spec -> architecture -> design -> verify -> deliver. Orchestrates analog-decompose, analog-behavioral, analog-design…
analog-audit
Audit analog circuit netlists for correctness, quality, and risks. Supports both pre-layout (schematic) and post-layout (extracted) netlists. Post-layout mode filters massive parasitic netlists before auditing. Works without EDA. TRIGGER on: "audit", "review netlist", "check this circuit", "design review"…
analog-decompose
Architect Phase 1: decompose top-level analog spec into sub-block specs. Use when starting a new analog design to select architecture, allocate budgets, define sub-block specs, write testbenches, and create verification plans.