Getting it into your agent
One page per mod, every tool's command on it. A separate URL per tool would split the same page into five that compete with each other.
npx skills add oaslananka/kicad-mcp-pro --skill kicad-pcb-reviewgit clone --depth 1 https://github.com/oaslananka/kicad-mcp-proWrote this? Show the measurements
A badge with what this costs and how it scanned, read live from this page, so it follows the numbers instead of freezing them. Markdown for a README, HTML for a documentation site or a project page.
[](https://agentmods.dev/skills/oaslananka/kicad-mcp-pro/kicad-pcb-review)<a href="https://agentmods.dev/skills/oaslananka/kicad-mcp-pro/kicad-pcb-review"><img src="https://agentmods.dev/badge/skills/oaslananka/kicad-mcp-pro/kicad-pcb-review/github.svg" alt="Measured on agentmods" height="20"></a>Or the 80×15 button, for a site that already has a row of RSS and ATOM ones. Only the verdict fits; the numbers stay here.
<a href="https://agentmods.dev/skills/oaslananka/kicad-mcp-pro/kicad-pcb-review"><img src="https://agentmods.dev/badge/skills/oaslananka/kicad-mcp-pro/kicad-pcb-review.svg" alt="Reviewed on agentmods" width="80" height="20"></a>- NVIDIA SkillSpector pass
What it costs to keep this loaded
Counted locally with the o200k_base tokenizer, which is exact for GPT models; Claude uses its own tokenizer and its counts differ. Treat this as one consistent yardstick across the catalogue rather than a bill. Prices are per million input tokens.
| Model | Per session | Once invoked |
|---|---|---|
| Fable 5.1 | $0.00019 | $0.00229 |
| Opus 5.5 | $0.00008 | $0.00092 |
| Sonnet 5.5 | $0.00004 | $0.00046 |
| Haiku 4.5 | $0.00002 | $0.00023 |
Grade A, and why
kicad-pcb-review scanned grade A with 0 findings against 26 rules in 11 categories — prompt injection, anti-refusal, data exfiltration, privilege escalation, supply chain, agent snooping, system-prompt leakage, SSRF and excessive agency — measured 1mo ago.
A static scan of the body, not an audit. Every finding is printed with the line that produced it so you can judge whether it matters here. A mod is markdown that instructs an agent; that is exactly why what it instructs is worth reading.
Nothing flagged
None of the 26 patterns this scan looks for appear in this file: no shell pipes, no recursive deletes, no credential paths, no hidden text, no instruction-override or anti-refusal phrasing, no agent-config snooping. That is not a guarantee, it is the absence of the things that are checkable.
What it actually says
KiCad PCB Review Skill
Use this skill when the task involves KiCad PCB projects, schematic review, DRC/ERC, DFM, manufacturing exports, BOM generation, or release preparation.
Workflow
- Verify: Call
kicad_get_project_infoandproject_quality_gate. - Inspect: Read current schematic and PCB state before editing.
- Edit: Explain changes, use dry-run if available, ask for confirmation.
- Validate: After any edit, run ERC → DRC → DFM checks.
- Release: Run full validation, export all artifacts, generate manifest.
Read-only First
Always prefer these tools unless modification is explicitly requested:
kicad_get_project_info,sch_get_symbols,pcb_get_board_summaryrun_erc,run_drc,validate_design,project_quality_gate
Refusal
Do not claim manufacturing readiness without passing all quality gates.
What this file has done since we first saw it
Hashed on every crawl. A supply-chain change to an agent config is a question of when, not whether, so the history is kept rather than the latest state alone.
- 1mo ago First seen · 27 lines · 19 tokens per session scan A 1689b8d76889
kicad-pcb-review is a skill published in the GitHub repository oaslananka/kicad-mcp-pro (156 stars, last pushed today), licensed MIT. It adds 19 tokens to every session and 229 once invoked, about $0.0001 per session on Opus 5.5. A static security scan graded it A with 0 findings. No closer match exists in the catalogue, so it is treated as the original; first seen 2026-08-30.
Other skills, from other repositories
jlcpcb-headstage-pcb
A project-specific guide for reviewing and improving printed-circuit-board designs made for JLCPCB's electronics-manufacturing service. It also covers manufacturing files such as Gerbers and drill files.
rtl-review
Audit RTL code for lint violations, synthesis hazards, coding-style compliance, and readability. Use when the user says "review this Verilog", "check my RTL", "lint this module", "is this code synthesizable", or shares an HDL file and asks for feedback before simulation or tape-in.
schematic-design
Use when executing a schematic placement plan (plan mode) or modifying an existing schematic (modification mode).
circuit-design
Use when designing an electronic circuit from requirements, choosing topology or regulator type, selecting component values, planning protection circuits, or deciding what goes on a board before schematic capture begins. Also use when the user asks "what components do I need" or "how should I power this.".
pcb-layout
Use when placing footprints on a PCB, routing traces, adding vias or copper zones, deciding trace widths, or planning board layout strategy. Also use when the user asks about PCB stackup, ground planes, trace spacing, or component placement on a board.
verification
Use when running ERC or DRC checks, fixing electrical or design rule violations, debugging unconnected nets, resolving "power pin not driven" errors, or preparing a design for manufacturing export. Also use when the user says "my ERC has errors" or "DRC is failing.".